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  • Next: µPD98404(NEASCOT-P30)

  • NEC (NEC ) : µPD98402A

    µPD98402A (NEASCOT-P15)

    This TC Sub layer controller performs function in conformance withthe ATM forum specification for cell transport over SONET at STS-3c/STM1 rate of 155 Mbps. It has UTOPIA cell interface and provides adifferential PECL signal for direct interface to an optical module.A internal loopback both at the media side and the ATM layer side is supported.

    Information used to be available at:
    http://www.ee.nec.de/Centers/TCAC/atm/upd98402a.html

    Technology: 0.35µ CMOS
    Package: PQFP 160 Pin


    external WWW: NEC : http://www.ee.nec.de/Centers/TCAC/atm/upd98402a.html web page used to be available at: http://www.ee.nec.de/Centers/TCAC/atm/upd98402a.html


    external PDF: NEC : http://www.ee.nec.de/_pdf/S10835EJ1V0DS00.PDF PDF documentation used to be available at: http://www.ee.nec.de/_pdf/S10835EJ1V0DS00.PDF
    If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
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