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HOTLink ReceiverThe CY7B923 HOTLink(TM) Transmitter and CY7B933 HOTLink Receiver are point-to-point communications building blocks that transfer data over high-speed serial links (fiber, coax, and twisted pair) at data rates from 160 to 330 Mbits/second (400 Mbits/second for -400 devices). Eight bits of user data or protocol information are loaded into the HOTLink transmitter and are encoded. Serial data is shifted out of the three differential positive ECL (PECL) serial ports at the bit rate (which is 10 times the byte rate). The HOTLink receiver accepts the serial bit stream at its differential line receiver i nputs and, using a completely integrated PLL Clock Synchronizer, recovers the timing information necessary for data reconstruction. The bit stream is deserialized, decoded, and checked for transmission errors. Recovered bytes are presented in parallel to the receiving host along with a byte rate clock. The 8B/10B encoder/decoder can be disabled in systems that already encode or scramble the transmitted data. I/O signals are available to create a seamless interface with both asynchronous FIFOs (i.e., CY7C42X) and clocked FIFOs (i.e., CY7C44X). A Built-In Self-Test pattern generator and checker allows testing of the transmitter, receiver, and the connecting link as a part of a system diagnostic check. Features are The IC is manufactured in 0.8 m BiCMOS Technology. The part is packaged in 28 pin SOIC/PLCC/LCC.
Documentation used to be available at:
http://www.cypress.com/portal/server.pt?space=CommunityPage&control=SetCommunity&CommunityID=209&PageID=259&fid=2&rpn=CY
PDF documentation used to be available at: http://www.cypress.com/portal/server.pt/gateway/PTARGS_0_2_1524_209_259_43/http%3B/sjapp20.mis.cypress.com%3B7001/publis If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access. | |||||||||||||||||||||||||||||||||
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