Provides complete physical layer transport of ATM cells at
STS-3c/ STM-1 rate of 155.52 MHz
STS-1 rate of 51.84M Hz
Compliant with ATM Forum User Network Interface 3.1 specification
UTOPIA ATM interface
ATM cell processing including
HEC generation/verification
Cell scrambling/descrambling
Rate adaption/idle cell filtering
Local Flow Control
Cell alignment
SONET frame processing including
Compliant with Bellcore GR-253, I.432,
T1.105, and G.709
Frame generation/recovery
SONET scrambling/descrambling
Frequency justification/pointer processing
Complete line interface
Clock and data recovery
Transmit timing derived from receiver or byte-rate source
SONET compliant PLL
100K PECL compatible I/O
Alarm indications including
Loss Of Signal
Out Of Frame, Loss Of Frame
Line Far End Receive Failure
Line Alarm Indication Signal
B1 Parity Error
Loss Of Cell Alignment
Loss Of Receive Data
Controller interface for internal interrupt and
configuration registers
Error monitoring
Status indication
Device configuration
The IC is manufactured in 0.65 m Low Power CMOS Technology.
The part is packaged in 128 pin PQFP.
Technology:
0.65µ Low Power CMOS
Package:
PQFP 128 Pin
web page used to be available at: http://www.cypress.com/products/datasheet.cfm?partnum=CY7C955-NC
PDF documentation used to be available at: http://www.cypress.com/pub/datasheets/cy7c955.pdf
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Last update:
14.11. 2009
Last link check:
01.03. 2006