LSI (LSI Logic Corperation ) : L64360

ATMizer

The ATMizer Architecture provides complete control over ATM Segmentation and Re-assembly and all ATM Layer functions. The architecture also includes the ATM Processing Unit, a 32-bit RISC CPU (based on MIPS R3000), which, trough user firmware, controls the functional blocks. Features of the ATMizer architecture are

• Support ATM rates of up to 155 Mbps.
• Simultaneously supports ATM Adaption Layers 1,2,3/4 and 5.
• Handles continuous and non-continuous CS-PDUs.
• 32 bit DMA addressing capabilities.
• Supports up to 65536 VCs.
• The internal RISC CPU controls: Scatter-Gather algorithms. AAL SAR PDU Header and Trailer translation, ATM Header generation and manipulation, Error Handling, Congestion Control, statistics
• UTOPIA and Standard ATM Interface (SAI).

Technology:	unknown
Package:	MQFP 208 Pin